Electrostatic discharge events that occur via a semiconductor chip may cause voltage increases that damage components of functional circuit blocks on the semiconductor chip. In some cases, the components may become nonfunctional when subject to a voltage spike that occurs during an electrostatic discharge event.
In a particular situation, metal oxide semiconductor (MOS) transistors may be included in interface circuits that are located between functional circuit blocks of a semiconductor chip. For example, the interface circuits may include buffer circuits that amplify the signal for a functional circuit block receiving a signal from another functional circuit block. In some cases, the different functional circuit blocks may be supplied by different power domains. That is, the positive and negative supply voltages provided to one functional circuit block may be provided by different sources than the positive and negative supply voltages provided to another functional circuit block. In some cases, the buffer circuits include MOS transistors with ultra thin gate dielectrics that may be particularly sensitive to damage during an electrostatic discharge event due to the voltage differences that can occur between the different power domains of the semiconductor chip. In some instances, clamping circuits may be coupled to the buffer circuits in order to prevent the voltage at the gates of the buffer circuit transistors from exceeding a specified value during an electrostatic discharge event.
The functional circuit blocks of an integrated circuit may also be coupled to supply voltages by a micro switch (also referred to as a “power switch”). The micro switches may be MOS transistors that temporarily switch off either the positive supply voltage or the negative supply voltage in order to decrease power consumption. In some scenarios, the clamping circuits coupled to the buffer circuits to mitigate the effects of electrostatic discharge events may be incompatible with these micro switches. To illustrate, when the micro switch is turned off and the semiconductor chip is not powered, leakage current in the functional circuit block coupled to the interface circuit may cause either the voltage at the internal positive line or the negative supply line to float or drift toward the opposite potential (i.e. the voltage of the internal positive supply line may drift toward the voltage of the negative supply voltage or the voltage of the internal negative supply line may drift toward the voltage of the positive supply voltage). The drifting of one of the supply line voltages may activate transistors of a clamping circuit included in the interface circuit and cause the leakage current to flow to other parts of the semiconductor chip, which leads to an increase in power consumption. In some instances, the current may occur between differing power domains and cause malfunction of a buffer circuit included in the interface circuit.